發表文章

目前顯示的是 8月, 2018的文章

Ring oscillator-1

圖片
Ring oscillator, which is a kind of voltage-controlled oscillator, is a very common topology in current technology. It can be used in many different fields, such as Analog Design, Digital Design, and RF design. In Figure 1, this topology is combined by three or odd numbers of inverters. The frequency of inverters can be influenced by increasing numbers of inverters, adding capacitors or adjusting the size of MOSFET.  Figure 1. Topology of Ring Oscillator The reason why this topology oscillates is gate delay. In the real world, because the gate (inverter) can't change the status immediately. Every gates need time to change the status. In odd numbers of inverters, if the last output of inverter is 1, output of first inverter will be -1 and cause oscillate.  Therefore, adding capacitor is useful for changing the time delay and its frequency. The formula of oscillation is given by: \[f=\frac{1}{2*t*n}\] However, in this topology, the numbers of inverters can be three...

Quadrature Oscillator-2 (IC and PCB layout)

圖片
In this section, I will mention what I did after the theory section. UMC 180 nm was used to make this integrate circuit. Figure 1. is the topology of Quadrature Oscillator and Table.1 is its dimension.  Figure 1. Topology of Quadrature Oscillator R 1 5k W R 2 2k W R 3 2k W R 4 5k W R 816 W 2R 1.632k W R f 1.59k W C 1 19.5nF C 2 19.5nF Table. 1 Dimension of Quadrature Oscillator Figure 2. is the layout of this chip. The c hip size: 505.32μm*546.690μm, 40 transistors, p ower dissipation: 32.2182 mW, and  MAX. Frequency: 20k Hz. This chip confirm DRC and LVS rules. Here I use guard ring to protect the signal and bypass capacitor to decrease the noise. However, in Figure. 2, we can find the width trace is very small, in this situation, the resistance of trace will increase, and easily influence the signal.  Figure 2. Layout of Quadrature Osci...

Quadrature Oscillator

圖片
Quadrature oscillator is an oscillator based on OP. In Figure.1, this topology is combined by a Miller integrator, and  noninverting  integrator. We u sually  add a limiter circuit to limit its voltage.  The oscillation condition is based on Barkhausen criterion: \[L(jw_{0})\doteq A(jw_{0})B(jw_{0})=1\] In Quadrature oscillator: \[L(s)= \frac{V_{o2}}{V_{x}}=-\frac{1}{S^{2}C^{2}R^{2}}\]  \[w_{0}=\frac{1}{CR}\] The frequency can be changed by change its capacitor and resistor. Therefore, capacitors and resistors are very critical.  Figure.1 Topology of Quadrature oscillator In this design, this circuit can output sine and cosine wave in the same time. And I also added two buffer in this circuit to make sure the signal won't be influenced. If the pole is at the right side of s-plane, the output amplitude increase and cause  distortion. On the other hand, if the pole is at the left side of s-plane the output amplitude will decrease....

This article is for testing.

Studying in master degree in USA is challenging. People have to learn as soon as possible to confirm professors' requirement. However, it's also very interesting for me. I tried so many different things which I never think about in my country. I read many things in other people's blog. How to design an chip and coding. They helped a lot and support me to overcome lots of technique problems. Now, I think is time for me to contribute my knowledge and help other's students. Because I am also a student. Therefore, some sections may unclear or confusing. If you have this problem, too. Please let me know. Maybe I can provide you more information. Or we can study together. Thank you, Shang-Kai, Wei.